1. Field of the Invention
The present invention illustrates a charge pump system, and more particularly, an adaptive charge pump system for reducing output ripple and peak current.
2. Description of the Prior Art
With the advancement of techniques, various memory devices or storage devices are applied to electronic devices. For example, dynamic random access memory (DRAM) is popularly used in personal computer. Specifically, an integrated circuit (IC) of the electronic device with memory device generally includes a charge pump system for providing voltages different from those provided by the power supply. In other words, the charge pump system can generate voltages for internal use that are different than the voltages provided at the power inputs of the IC. Various designs for charge pump systems are well known in the art and may include capacitors to store charges at different stages within the charge pump arrays. Some charge pump systems may use bypass capacitors on the output of the charge pump array to reduce noise on the output, and multiple charge pump arrays may be ganged in parallel.
Although conventional charge pump system can provide a specific or a desired voltage different from the power supply, two major disadvantages of using conventional charge pump system are unavoidable. First, power efficiency of the conventional charge pump system is degraded when a low voltage power supplies is applied. Second, since the conventional charge pump system cannot deal with adaptive charge pump arrays to provide an appropriate voltage output, the conventional charge pump system may suffer severe power consumption.
Thus, it is important to develop a charge pump system to adaptively control the charge pump arrays for reducing power consumption, output ripple and peak current.